No matter how far we proceed into adulthood or how sophisticated we claim to be, a certain unmasked boyish glee always appears when a new CPU hits the scene.
IBM's Power5 and Power6 announcement is as good an inducement for that twinkled eye effect as any, but the competition may be sporting just a wry grin.
Here's the lowdown: The forthcoming Power5 processor will debut at 0.13u (130 nanometers) and will probably shrink a bit before it's done. That decrease in size will result in an increase in internal processing speed (or, if you're a purist, bandwidth). It's still a shared-core design--as was the Power4--and this time around IBM has also endowed the CPU with simultaneous multithreading, which is very similar to what Intel has implemented on its Pentium 4 Xeons.
Technically, that method doubles the processor's ability to do work. That's not usually the case in real life but, according to Ravi Arimilli, an IBM Fellow and the chief technology officer for the Power line of chips, IBM's implementation will deliver 2x performance. Of course, as a shared-core processor, that would effectively give the Power5 a roughly 4x CPU standing. If a 2-way Power5 implementation is inspiring dreams of 8-way performance without the associated multiple software licensing fees, don't count your savings so quickly. Some software company somewhere is, right now, probably trying to figure out a new licensing plan that doesn't let its royalty fees become quartered. Others will follow. That's the way it is.
Additional circuitry will help increase the Power5's ability to detect errors, moving from a recovery rate that Arimilli called "significant" with the Power4 to a rate he's describing as 95 to 97 percent. Partitioning will also get a boost in that the Power5 will allow hundreds of partitions per processor.
But wait, there's more. (Isn't there always?) IBM will also implement some higher order software functions in silicon to free up processor time. Called "Fast Path," it will handle TCP/IP packaging functions when implemented on the Power5, and its expertise will evolve with the Power6. IBM claims this was done without significantly increasing the transistor count, instead using existing execution units in a more intelligent fashion. Power6 will add even more capabilities.
The aim for the Power5--and Power6 after it--is not just the thin-air Unix market but also blades and super-thin stackable servers. IBM has already alerted its existing and potential customer base not to expect its blades to have a low power profile. Power4 produces 125 watts of power and it's not expected that the Power5 will beat that by much, if at all (if not exceed it by a bit).
Can we start celebrating now? Maybe not. Despite a Q202 announcement, the Power5 isn't expected to hit the shelves until 2004 and the Power6 may not follow until 2006. That may be an admirable schedule when stacked against Sun's typical time to market, but IBM seems to have neglected two somewhat smaller, yet salient points: Intel and AMD.
IBM may see Sun as its competition, and it is at the high-end. But both Intel and AMD are rivals-apparent for the blade market--especially if IBM is validating the use of non-low power CPUs in that arena. The heated competition between Intel and AMD has brought on some excellent broken field running from the two, along with some remarkable new CPUs and surprisingly short times to market. IBM plans to migrate a Power4 variant down the chain in the interim, but that may prove to be too little, too late. Arimilli once mentioned to me that IBM has the resources, and is willing to commit them, to meet any goal it sets. Q203 for Power5 might be something to consider if it wants to flush the market from top to bottom.
How do you think IBM's chip strategy will affect the blade market? Share your thoughts in our TalkBack forum, or drop a line to Bill.
