Pat Gelsinger, general manager of Intel's Digital Enterprise Group, disclosed the instruction set extension during a keynote speech here at the Intel Developer Forum. And in what he said is a departure from previous extensions to x86, the chipmaker is sharing them publicly much earlier in their development.
Intel chose to introduce earlier disclosure to help software companies that must adapt their programs to take advantage of the extensions, Gelsinger said. He added that he recognizes the choice will help rival Advanced Micro Devices follow suit.
"We're enabling the industry to benefit" from Intel's faster cadence of architecture development, Gelsinger said. "As a consequence, the competition will see those sooner as well. We fully expect that will be one of the results."
Microsoft and Adobe Systems both are working with Intel already to support the instructions, Gelsinger said.
The new instructions are scheduled to debut in the "Penryn" generation of processors, due to start arriving in 2008 and built using a manufacturing process with 45-nanometer features, said Kirk Skaugen, general manager of Intel's Server Platforms Group.
The instructions fall into two broad categories. First is SSE4, the fourth generation of Streaming SIMD (single instruction, multiple data) Extensions. SIMD lets a chip take the same action with more than one data element, instead of requiring an instruction to be paired with each element--an approach that economizes many operations dealing with graphics, video and audio. SSE4 also will improve high-performance computing, Intel said.
The second category accelerates two specific applications. One is searching and pattern-matching, useful for tasks such as handwriting recognition and genetic research. The other is cyclical redundancy check (CRC) technology, which monitors the integrity of data transfer to and from storage systems and other computers.
SAN FRANCISCO--Intel on Wednesday began detailing a plan to add about 50 new instructions to its x86 chips, in an effort to speed up tasks including search, mathematical calculations and multimedia processing.Pat Gelsinger, general manager of Intel's Digital Enterprise Group, disclosed the instruction set extension during a keynote speech here at the Intel Developer Forum. And in what he said is a departure from previous extensions to x86, the chipmaker is sharing them publicly much earlier in their development.
Intel chose to introduce earlier disclosure to help software companies that must adapt their programs to take advantage of the extensions, Gelsinger said. He added that he recognizes the choice will help rival Advanced Micro Devices follow suit.
"We're enabling the industry to benefit" from Intel's faster cadence of architecture development, Gelsinger said. "As a consequence, the competition will see those sooner as well. We fully expect that will be one of the results."
Microsoft and Adobe Systems both are working with Intel already to support the instructions, Gelsinger said.
The new instructions are scheduled to debut in the "Penryn" generation of processors, due to start arriving in 2008 and built using a manufacturing process with 45-nanometer features, said Kirk Skaugen, general manager of Intel's Server Platforms Group.
The instructions fall into two broad categories. First is SSE4, the fourth generation of Streaming SIMD (single instruction, multiple data) Extensions. SIMD lets a chip take the same action with more than one data element, instead of requiring an instruction to be paired with each element--an approach that economizes many operations dealing with graphics, video and audio. SSE4 also will improve high-performance computing, Intel said.
The second category accelerates two specific applications. One is searching and pattern-matching, useful for tasks such as handwriting recognition and genetic research. The other is cyclical redundancy check (CRC) technology, which monitors the integrity of data transfer to and from storage systems and other computers.
